LICENSE.md
MANIFEST.in
README.md
pyproject.toml
src/digsim/__init__.py
src/digsim/app/__main__.py
src/digsim/app/gui/__init__.py
src/digsim/app/gui/_circuit_area.py
src/digsim/app/gui/_component_selection.py
src/digsim/app/gui/_main_window.py
src/digsim/app/gui/_top_bar.py
src/digsim/app/gui/_utils.py
src/digsim/app/gui/_warning_dialog.py
src/digsim/app/gui_objects/__init__.py
src/digsim/app/gui_objects/_bus_bit_object.py
src/digsim/app/gui_objects/_buzzer_object.py
src/digsim/app/gui_objects/_component_context_menu.py
src/digsim/app/gui_objects/_component_object.py
src/digsim/app/gui_objects/_component_port_item.py
src/digsim/app/gui_objects/_dip_switch_object.py
src/digsim/app/gui_objects/_gui_note_object.py
src/digsim/app/gui_objects/_gui_object_factory.py
src/digsim/app/gui_objects/_hexdigit_object.py
src/digsim/app/gui_objects/_image_objects.py
src/digsim/app/gui_objects/_label_object.py
src/digsim/app/gui_objects/_logic_analyzer_object.py
src/digsim/app/gui_objects/_seven_segment_object.py
src/digsim/app/gui_objects/_shortcut_objects.py
src/digsim/app/gui_objects/_yosys_object.py
src/digsim/app/gui_objects/images/AND.png
src/digsim/app/gui_objects/images/Analyzer.png
src/digsim/app/gui_objects/images/BUF.png
src/digsim/app/gui_objects/images/Buzzer.png
src/digsim/app/gui_objects/images/Clock.png
src/digsim/app/gui_objects/images/DFF.png
src/digsim/app/gui_objects/images/DIP_SWITCH.png
src/digsim/app/gui_objects/images/FlipFlop.png
src/digsim/app/gui_objects/images/IC.png
src/digsim/app/gui_objects/images/LED_OFF.png
src/digsim/app/gui_objects/images/LED_ON.png
src/digsim/app/gui_objects/images/MUX.png
src/digsim/app/gui_objects/images/NAND.png
src/digsim/app/gui_objects/images/NOR.png
src/digsim/app/gui_objects/images/NOT.png
src/digsim/app/gui_objects/images/ONE.png
src/digsim/app/gui_objects/images/OR.png
src/digsim/app/gui_objects/images/PB.png
src/digsim/app/gui_objects/images/Switch_OFF.png
src/digsim/app/gui_objects/images/Switch_ON.png
src/digsim/app/gui_objects/images/XNOR.png
src/digsim/app/gui_objects/images/XOR.png
src/digsim/app/gui_objects/images/YOSYS.png
src/digsim/app/gui_objects/images/ZERO.png
src/digsim/app/images/app_icon.png
src/digsim/app/model/__init__.py
src/digsim/app/model/_model.py
src/digsim/app/model/_model_components.py
src/digsim/app/model/_model_new_wire.py
src/digsim/app/model/_model_objects.py
src/digsim/app/model/_model_settings.py
src/digsim/app/model/_model_shortcuts.py
src/digsim/app/settings/__init__.py
src/digsim/app/settings/_component_settings.py
src/digsim/app/settings/_gui_settings.py
src/digsim/app/settings/_shortcut_dialog.py
src/digsim/circuit/__init__.py
src/digsim/circuit/_circuit.py
src/digsim/circuit/_waves_writer.py
src/digsim/circuit/components/__init__.py
src/digsim/circuit/components/_bus_bits.py
src/digsim/circuit/components/_button.py
src/digsim/circuit/components/_buzzer.py
src/digsim/circuit/components/_clock.py
src/digsim/circuit/components/_dip_switch.py
src/digsim/circuit/components/_flip_flops.py
src/digsim/circuit/components/_gates.py
src/digsim/circuit/components/_hexdigit.py
src/digsim/circuit/components/_ic.py
src/digsim/circuit/components/_label_wire.py
src/digsim/circuit/components/_led.py
src/digsim/circuit/components/_logic_analyzer.py
src/digsim/circuit/components/_mem64kbyte.py
src/digsim/circuit/components/_memstdout.py
src/digsim/circuit/components/_note.py
src/digsim/circuit/components/_on_off_switch.py
src/digsim/circuit/components/_seven_segment.py
src/digsim/circuit/components/_static_level.py
src/digsim/circuit/components/_static_value.py
src/digsim/circuit/components/_yosys_atoms.py
src/digsim/circuit/components/_yosys_component.py
src/digsim/circuit/components/atoms/__init__.py
src/digsim/circuit/components/atoms/_component.py
src/digsim/circuit/components/atoms/_digsim_exception.py
src/digsim/circuit/components/atoms/_port.py
src/digsim/circuit/components/ic/74162.json
src/digsim/circuit/components/ic/7448.json
src/digsim/storage_model/__init__.py
src/digsim/storage_model/_app.py
src/digsim/storage_model/_circuit.py
src/digsim/synth/__init__.py
src/digsim/synth/__main__.py
src/digsim/synth/_synthesis.py
src/digsim/utils/__init__.py
src/digsim/utils/_yosys_netlist.py
src/digsim_logic_simulator.egg-info/PKG-INFO
src/digsim_logic_simulator.egg-info/SOURCES.txt
src/digsim_logic_simulator.egg-info/dependency_links.txt
src/digsim_logic_simulator.egg-info/requires.txt
src/digsim_logic_simulator.egg-info/top_level.txt
tests/test_gates.py
tests/test_yosys_aldff.py
tests/test_yosys_dff.py
tests/test_yosys_dlatch.py
tests/test_yosys_gates.py
tests/test_yosys_latch.py
tests/test_yosys_netlist.py
tests/test_yosys_sdff.py
tests/test_yosys_sr.py
tests/test_yosys_synth.py