Metadata-Version: 2.1
Name: py4hw
Version: 0.0.2
Summary: py4hw is a library to model, and simulate digital logic circuits. It propomotes the use of structural design description to build hardware, and it is highly influenced by the ideas behind JHDL.
Home-page: https://github.com/davidcastells/py4hw
Author: David Castells-Rufas
Author-email: david.castells@uab.cat
License: UNKNOWN
Platform: UNKNOWN
Description-Content-Type: text/markdown

# py4hw

py4hw is an HDL language based on python to create digital circuits following a structural design methodology. It is highly influenced by the JHDL principles.

clock is implicit

A hardware system is defined by HWSystem


All Hardware blocks inherit from class Logic

There are 2 types of Logic circuits structural and behavioural ones.

Structural circuits just instantiate other circuits.

Behavioural circuits describe the circuit behaviour by some functions.
There are 2 types of behavioural circuits: Combinational and Sequential.

Combination circuits must implement the "propagate" function

Sequential circuits must implement the "clock" function.


