.gitignore
.gitlab-ci.yml
COPYRIGHT.md
LICENSE.md
MANIFEST.in
README.md
cell_list.yml
dodo.py
env.sh
setup.py
LICENSES/agpl-3.0.txt
LICENSES/cern_ohl_s_v2.txt
LICENSES/gpl-2.0.txt
c4m/__init__.py
c4m/pdk/__init__.py
c4m/pdk/gf180mcu/__init__.py
c4m/pdk/gf180mcu/pdkmaster.py
c4m/pdk/gf180mcu/pyspice.py
c4m/pdk/gf180mcu/stdcell.py
c4m/pdk/gf180mcu/models/__init__.py
c4m/pdk/gf180mcu/models/all.spice
c4m/pdk/gf180mcu/models/design.ngspice
c4m/pdk/gf180mcu/models/sm141064.ngspice
c4m_pdk_gf180mcu.egg-info/PKG-INFO
c4m_pdk_gf180mcu.egg-info/SOURCES.txt
c4m_pdk_gf180mcu.egg-info/dependency_links.txt
c4m_pdk_gf180mcu.egg-info/requires.txt
c4m_pdk_gf180mcu.egg-info/top_level.txt
override/StdCell3V3Lib/verilog/decap_w0.v
override/StdCell3V3Lib/verilog/one_x1.v
override/StdCell3V3Lib/verilog/zero_x1.v
override/StdCell3V3Lib/verilog/zeroone_x1.v
override/StdCell3V3Lib/vhdl/decap_w0.vhdl
override/StdCell3V3Lib/vhdl/one_x1.vhdl
override/StdCell3V3Lib/vhdl/zero_x1.vhdl
override/StdCell3V3Lib/vhdl/zeroone_x1.vhdl
override/StdCell5V0Lib/verilog/decap_w0.v
override/StdCell5V0Lib/verilog/one_x1.v
override/StdCell5V0Lib/verilog/zero_x1.v
override/StdCell5V0Lib/verilog/zeroone_x1.v
override/StdCell5V0Lib/vhdl/decap_w0.vhdl
override/StdCell5V0Lib/vhdl/one_x1.vhdl
override/StdCell5V0Lib/vhdl/zero_x1.vhdl
override/StdCell5V0Lib/vhdl/zeroone_x1.vhdl